Publications

FPGA Based Accelerator for Buried Objects Identification

Elsaadouny, M. and Barowski, J. and Rolfes, I.

2020 43RD INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING, TSP 2020
Volume: Pages: 559-562
DOI: 10.1109/TSP49548.2020.9163583
Published: 2020

Abstract
The convolutional neural networks(ConvNets) have emerged during the past few years due to various advancements in the field of artificial intelligence. They have participated in different applications and complex problems and gained significant success in images classification tasks. As these algorithms require intensive operations, different researches have been conducted to provide various hardware accelerators for these algorithms. Different studies have investigated the implementation of the graphic processing units(GPUs) and application-specific integrated circuits (ASICs) for decreasing the processing time of the ConvNets. In this research, the authors present a fast framework for GPR images classification based on the Xilinx PYNQ platform. This framework offers high-level language integration to facilitate the design of the projects. Various experiments have taken place to prepare the GPR dataset and the designed ConvNet has been integrated on PYNQ to perform real-time calculations. The obtained results indicate an outstanding time processing improvement while preserving the classification accuracy. © 2020 IEEE.

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